Germanium (Ge) is a promising material for advanced semiconductor devices, because it provides much higher carrier mobilities than Silicon (Si). A remaining stumbling block to the association of Germanium (Ge) with production processes of advanced logic devices, is the high contact resistance to n-type Ge layers. The performance of Ge and III-V devices can be improved by reducing contact resistance and process variability. High resistance may arise from poor quality contacts, process variability can arise from rough or unintentionally textured surfaces.
An approach to create stable low resistive contacts is to form a metal-semiconductor alloy, such as NiGe, at the surface in combination with high doping concentrations underneath. Specifically in Ge, the n-type system has proven difficult because of the large electron Schottky barrier height (eSBH) and resulting high contact resistance (ρc), and surface states associated with dangling bonds at the Ge surface can lead to Fermi-Level Pinning (FLP) [1, 2]. This can affect metal/Ge contact behaviour, because the Fermi level is pinned close to the valence band.
Three of the most common n-type Ge contact solutions include (a) ultra-thin amorphous insulating layers to terminate the free dangling bonds and eliminate FLP, (b) surface passivation to bond other impurity species to the dangling Ge bonds at the surface, and (c) optimization of the metal-semiconductor alloy, such as NiGe, in combination with high active doping concentrations underneath to create stable low-resistive contacts. To form the metal/semiconductor alloy, Ni is deposited, and then an anneal is performed to react the Ni with the Ge. Typically a standard anneal (Rapid-Thermal-Anneal, or RTA) is applied. This results in a relatively rough interface between the NiGe layer and the Ge underneath. The NiGe material is poly-crystalline in nature so it is generally not planar.
Theoretical studies have shown that a thin insulating tunnel barrier can de-pin the Ge surface with optimum thicknesses of approximately 1 nm [4]. Selenium segregation was recently used to reduce eSBH for NiGe/n-Ge contacts [5], while CF4 plasma treatment of the Ge surface was experimentally demonstrated to alleviate FLP [6]. Gallacher et al. extracted specific contact resistivity (ρc) of 2.3×10−7 Ω·cm2 on n-type Ge that was doped during epitaxial growth [7]. The optimum NiGe formation temperature was a 340° C. Rapid Thermal Anneal (RTA). However, the NiGe interface with the underlying substrate was not smooth.
Laser-Thermal-Annealing (LTA) techniques are of increasing interest in semiconductor processing, as it enables ultrafast annealing with very limited thermal budgets. It can suppress dopant diffusion and generates high levels of dopant activation. Specifically in Ge, Mazzocchi et al. reported high activation levels of B and P dopants (>1×1020 cm−3) as well as limited diffusion when they used LTA with energy densities in the range of 0.57-1.8 J/cm2 [8]. High quality n+/p junctions were also realized using LTA of Sb-doped Ge by Thareja et al. [9]. Furthermore, Firrincieli et al. reported ρc of 8×10−7 Ω·cm2 on n-type Ge where LTA was used for dopant activation, in combination with RTA for NiGe formation [10]. The NiGe layers were thermally stable up to 350° C., but the interface with the Ge substrate was not flat. This is common for NiGe layers formed by RTA. Another example is disclosed in a paper by LIM P S Y et al entitled ‘Fermi-level depinning at the metal-germanium interface by the formation of epitaxial nickel digermanide NiGe2 using pulsed laser anneal’—Applied Physics Letters American Institute of Physics USA, col. 101, no 17, 22 Oct. 2012.
An improved method of providing semiconductor devices with low resistance contacts is therefore required, which mitigates at least the above shortcomings of the prior art.